Commit c9cdd7f3 authored by Andrew Wheeler's avatar Andrew Wheeler Committed by Nikola Majkić
Browse files

Revert "msm: acpuclock-cortex: Detect bootloader cpu configuration"

The phone will not boot with this change.

This reverts commit 8016dca8.

Conflicts:
	arch/arm/mach-msm/acpuclock-8226.c

Change-Id: I0d99de60ba139d819a9521a2f2a9f606ed716b7d
Reviewed-on: http://gerrit.pcs.mot.com/547213


SLT-Approved: Slta Waiver <sltawvr@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
Tested-by: default avatarJira Key <jirakey@motorola.com>
Reviewed-by: default avatarAndrew Wheeler <thf876@motorola.com>
parent 39d20b35
......@@ -134,6 +134,7 @@ static struct clkctl_acpu_speed *pvs_tables_8226[NUM_SPEED_BIN] = {
static struct acpuclk_drv_data drv_data = {
.freq_tbl = acpu_freq_tbl_8226_1p1,
.pvs_tables = pvs_tables_8226,
.current_speed = &(struct clkctl_acpu_speed){ 0 },
.bus_scale = &bus_client_pdata,
.vdd_max_cpu = CPR_CORNER_12,
.src_clocks = {
......
......@@ -65,6 +65,7 @@ static struct clkctl_acpu_speed acpu_freq_tbl[] = {
static struct acpuclk_drv_data drv_data = {
.freq_tbl = acpu_freq_tbl,
.current_speed = &(struct clkctl_acpu_speed){ 0 },
.bus_scale = &bus_client_pdata,
.vdd_max_cpu = LVL_HIGH,
.vdd_max_mem = 1050000,
......
......@@ -143,49 +143,6 @@ static void select_clk_source_div(struct acpuclk_drv_data *drv_data,
pr_warn("acpu rcg didn't update its configuration\n");
}
static struct clkctl_acpu_speed *__init find_cur_cpu_level(void)
{
struct clkctl_acpu_speed *f, *max = priv->freq_tbl;
void __iomem *apcs_rcg_config = priv->apcs_rcg_config;
struct acpuclk_reg_data *r = &priv->reg_data;
u32 regval, div, src;
unsigned long rate;
struct clk *parent;
regval = readl_relaxed(apcs_rcg_config);
src = regval & r->cfg_src_mask;
src >>= r->cfg_src_shift;
div = regval & r->cfg_div_mask;
div >>= r->cfg_div_shift;
/* No support for half-integer dividers */
div = div > 1 ? (div + 1) / 2 : 0;
for (f = priv->freq_tbl; f->khz; f++) {
if (f->use_for_scaling)
max = f;
if (f->src_sel != src || f->src_div != div)
continue;
parent = priv->src_clocks[f->src].clk;
rate = parent->rate / (div ? div : 1);
if (f->khz * 1000 == rate)
break;
}
if (f->khz)
return f;
pr_err("CPUs are running at an unknown rate. Defaulting to %u KHz.\n",
max->khz);
/* Change to a safe frequency */
select_clk_source_div(priv, priv->freq_tbl);
/* Default to largest frequency */
return max;
}
static int set_speed_atomic(struct clkctl_acpu_speed *tgt_s)
{
struct clkctl_acpu_speed *strt_s = priv->current_speed;
......@@ -279,7 +236,7 @@ static int acpuclk_cortex_set_rate(int cpu, unsigned long rate,
strt_s = priv->current_speed;
/* Return early if rate didn't change */
if (rate == strt_s->khz && reason != SETRATE_INIT)
if (rate == strt_s->khz)
goto out;
/* Find target frequency */
......@@ -292,7 +249,7 @@ static int acpuclk_cortex_set_rate(int cpu, unsigned long rate,
}
/* Increase VDD levels if needed */
if ((reason == SETRATE_CPUFREQ)
if ((reason == SETRATE_CPUFREQ || reason == SETRATE_INIT)
&& (tgt_s->khz > strt_s->khz)) {
rc = increase_vdd(tgt_s->vdd_cpu, tgt_s->vdd_mem);
if (rc)
......@@ -322,7 +279,7 @@ static int acpuclk_cortex_set_rate(int cpu, unsigned long rate,
set_bus_bw(tgt_s->bw_level);
/* Drop VDD levels if we can. */
if (tgt_s->khz < strt_s->khz || reason == SETRATE_INIT)
if (tgt_s->khz < strt_s->khz)
decrease_vdd(tgt_s->vdd_cpu, tgt_s->vdd_mem);
#ifdef CONFIG_SEC_DEBUG_VERBOSE_SUMMARY_HTML
......@@ -437,8 +394,8 @@ static struct clkctl_acpu_speed *__init select_freq_plan(void)
int __init acpuclk_cortex_init(struct platform_device *pdev,
struct acpuclk_drv_data *data)
{
int rc;
int parent;
unsigned long max_cpu_khz = 0;
int i, rc;
priv = data;
mutex_init(&priv->lock);
......@@ -458,41 +415,46 @@ int __init acpuclk_cortex_init(struct platform_device *pdev,
BUG();
}
/* Improve boot time by ramping up CPU immediately */
for (i = 0; priv->freq_tbl[i].khz != 0; i++)
if (priv->freq_tbl[i].use_for_scaling)
max_cpu_khz = priv->freq_tbl[i].khz;
/* Initialize regulators */
rc = increase_vdd(priv->vdd_max_cpu, priv->vdd_max_mem);
if (rc)
return rc;
goto err_vdd;
if (priv->vdd_mem) {
rc = regulator_enable(priv->vdd_mem);
if (rc) {
dev_err(&pdev->dev, "regulator_enable for mem failed\n");
return rc;
goto err_vdd;
}
}
rc = regulator_enable(priv->vdd_cpu);
if (rc) {
dev_err(&pdev->dev, "regulator_enable for cpu failed\n");
return rc;
}
priv->current_speed = find_cur_cpu_level();
parent = priv->current_speed->src;
rc = clk_prepare_enable(priv->src_clocks[parent].clk);
if (rc) {
dev_err(&pdev->dev, "handoff: prepare_enable failed\n");
return rc;
goto err_vdd_cpu;
}
rc = acpuclk_cortex_set_rate(0, priv->current_speed->khz, SETRATE_INIT);
if (rc) {
dev_err(&pdev->dev, "handoff: set rate failed\n");
return rc;
}
/*
* Select a state which is always a valid transition to align SW with
* the HW configuration set by the bootloaders.
*/
acpuclk_cortex_set_rate(0, acpuclk_cortex_data.power_collapse_khz,
SETRATE_INIT);
acpuclk_cortex_set_rate(0, max_cpu_khz, SETRATE_INIT);
acpuclk_register(&acpuclk_cortex_data);
cpufreq_table_init();
return 0;
err_vdd_cpu:
if (priv->vdd_mem)
regulator_disable(priv->vdd_mem);
err_vdd:
return rc;
}
......@@ -2885,6 +2885,11 @@ static struct pll_clk a7sspll = {
},
.num_fmax = VDD_SR2_PLL_NUM,
CLK_INIT(a7sspll.c),
/*
* Need to skip handoff of the acpu pll to avoid
* turning off the pll when the cpu is using it
*/
.flags = CLKFLAG_SKIP_HANDOFF,
},
};
......
......@@ -590,6 +590,11 @@ static struct pll_clk a7sspll = {
},
.num_fmax = VDD_SR2_PLL_NUM,
CLK_INIT(a7sspll.c),
/*
* Need to skip handoff of the acpu pll to avoid
* turning off the pll when the cpu is using it
*/
.flags = CLKFLAG_SKIP_HANDOFF,
},
};
......
......@@ -394,6 +394,10 @@ static struct pll_freq_tbl apcs_pll_freq[] = {
PLL_F_END
};
/*
* Need to skip handoff of the acpu pll to avoid handoff code
* to turn off the pll when the acpu is running off this pll.
*/
static struct pll_clk apcspll_clk_src = {
.mode_reg = (void __iomem *)APCS_CPU_PLL_MODE_REG,
.l_reg = (void __iomem *)APCS_CPU_PLL_L_REG,
......@@ -415,6 +419,7 @@ static struct pll_clk apcspll_clk_src = {
.dbg_name = "apcspll_clk_src",
.ops = &clk_ops_local_pll,
CLK_INIT(apcspll_clk_src.c),
.flags = CLKFLAG_SKIP_HANDOFF,
},
};
......
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