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Change-Id: Ide49248c9ac849a23f1ee1d5fe93490b15eb6689

Change-Id: Ic84c04a142b9cbbf6c5295414fe8ba33b52acc32

Change-Id: I547f48e05989879a73c4238dc19635c6f7a6c185

Change-Id: I8759cd9a4b57dc1ac2eca3135236faca49cce902

Change-Id: I12d5219060507c9bafca3649e7545fd3ab9700b6

Change-Id: I8b5113cf5d65eef3cd1af00d884fe90259b99def

Change-Id: If790ea2f6e499994b6cf5375577bb994d0093b34

Change-Id: I7c40145548e8ba257d6e5383b1d6e27c69a71b01

Change-Id: Ib3d1dbf2b62027150bef9c058b1808688e359cba

Change-Id: Ief83e16a6e819ec44cabad257fbf08998a1992f7

Change-Id: I232facdc46fe8aa5a32760bd2880bf1424dc26c4

Change-Id: If4acca078b108e260b7638f672c00a707523282a

When executing the code "git show-ref -s --abbrev --tags $tag" and the
output spans multiple lines, it results in generation of a directory
in the kernel objects causing build failure.

Ex:

$ git show-ref -s --abbrev --tags LNX.LA.3.2-00520-8x26
04163f5
04163f5

Results in:

"ln: target `04163f5-00951-g2403ab9/source' is not a directory"

Fix this by pruning anything after the first line of output.

Change-Id: Iebe1e6fa88951ec0f1dab383adeb6faa72872295
Signed-off-by: Jason Hrycay <jason.hrycay@motorola.com>

For RGB 666 panel format on DSI, a change has been made earlier to set the
alignment to MSB. This was causing color corruption on EDP panel as it
requires LSB alignment. This fix is to set the MSB alignment for RGB666
format only on DSI panels, so that it doesn't affect EDP.

Change-Id: If07b915bb30b00ff1824c7c662bbf4db8a217a6b
Signed-off-by: Vineet Bajaj <vbajaj@codeaurora.org>

The tile control parameter is used by the Assertive Display
block to control merged mode or independent mode AD for
dual-pipe AD. However, in single pipe AD, the tile control
should always be set to zero.

Change-Id: I0dd3c3b716fd5156d9a0f9206911159d186fd9c7
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Signed-off-by: Ping Li <quicpingli@codeaurora.org>

Power on HPD accesses HDMI registers. HDMI AHB clock needs to be
enabled while HPD is being powered on.

Change-Id: I483ac56b41e3bd3794878940fbd0d5242dd5d1cd
Signed-off-by: Casey Piper <cpiper@codeaurora.org>

Currently for RGB666 format, the MDP output is set as LSB aligned
and banding artifacts are observed due to this. Set the MDP output
to be MSB aligned to avoid these artifacts and for the display
to show up fine with RGB666 format.

Change-Id: Id8b7bf03218dd0ea70ada34912afd092e239b89f
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>

Add support to check ESD status by register read for
DSI-v2 based platforms.

Change-Id: I013d31c67b3e5c61b7723ecb234be06c2fd5a451
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Nirmal Abraham <nabrah@codeaurora.org>

While calculating source and destination rect of a pipe for the
programmed ROI, consider FLIP flags set for the pipe.

Change-Id: I631453c26f443b08a23556f83195d9914e05b41d
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>

Some video mode panels need to have the command mode
operation interleaved on the last line of the video stream.
Add support to enable this register via a panel dtsi property.

Change-Id: I3dfe36816d7602da4f66d09ea23ac9c6185f9858
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>

The short response can be <=2 bytes.

Change-Id: Iad322bc892ea29b2acf220ef579d18dea1a91c32
Signed-off-by: Terence Hampson <thampson@codeaurora.org>

When ppp hw is performing csc from yuv to rgb there is a color
swap. In order to account for this we need to swap the unpack
and packing order.

Change-Id: I55df9a87300f3ce2c9bf5352725f3ce1d2b1b8a4
Signed-off-by: Terence Hampson <thampson@codeaurora.org>

Calibration tool should have register access on all layer
mixers connected to DSPP pipe and WB path. It should
also have control layer register access to read
the current layer mixer configuration.

Change-Id: If2cc86c2e6f470e090746a400b16cb540948c3e9
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>

Turn off the backlight while shut down panel as it
could show white flicker depending on the panel.

Change-Id: Ic5d4e97e70c87e5b6e956e27a766136610d6f345
Signed-off-by: Shuo Yan <shuoy@codeaurora.org>

At the time of dsi interrupt handler registration, there may be
a pending dsi interrupt. This can cause a dead-lock, as dsi clocks
and resources are not initialized properly yet.

Change-Id: I511d0776f5d7b500f0f32f2ae9d92ac031f8e613
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>

commit 72c04af9a2d57b7945cf3de8e71461bd80695d50 upstream.

When using the MERAM the LCDC line size needs to be programmed with a
MERAM-specific value different than the real frame buffer pitch. Fix it.
Reported-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

commit d8636a2717bb3da2a7ce2154bf08de90bb8c87b0 upstream.

So we've had a fair few reports of fbcon handover breakage between
efi/vesafb and i915 surface recently, so I dedicated a couple of
days to finding the problem.

Essentially the last thing we saw was the conflicting framebuffer
message and that was all.

So after much tracing with direct netconsole writes (printks
under console_lock not so useful), I think I found the race.

Thread A (driver load)    Thread B (timer thread)
  unbind_con_driver ->              |
  bind_con_driver ->                |
  vc->vc_sw->con_deinit ->          |
  fbcon_deinit ->                   |
  console_lock()                    |
      |                             |
      |                       fbcon_flashcursor timer fires
      |                       console_lock() <- blocked for A
      |
      |
fbcon_del_cursor_timer ->
  del_timer_sync
  (BOOM)

Of course because all of this is under the console lock,
we never see anything, also since we also just unbound the active
console guess what we never see anything.

Hopefully this fixes the problem for anyone seeing vesafb->kms
driver handoff.

v1.1: add comment suggestion from Alan.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Tested-by: Josh Boyer <jwboyer@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

MDSS DSI driver currently programs certain DSI PLL registers as
part of the DSI PHY off sequence. This is incorrect and could
lead to some unexpected errors such as DSI PLL getting turned off
while the branch clocks are still on. Fix this by removing all
such register programming.

Change-Id: Ie1e88cd18de6b8ef8804f7a2b34b8b8282166c96
CRs-Fixed: 509801
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>