Commit 577f99c1 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6

Conflicts:

	drivers/net/wireless/rt2x00/rt2x00dev.c
	net/8021q/vlan_dev.c
parents 26c0f03f 2f633928
......@@ -29,9 +29,6 @@
#define KERNEL_RAM_VADDR (PAGE_OFFSET + TEXT_OFFSET)
#define KERNEL_RAM_PADDR (PHYS_OFFSET + TEXT_OFFSET)
#define ATAG_CORE 0x54410001
#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
/*
* swapper_pg_dir is the virtual address of the initial page table.
......
......@@ -431,6 +431,11 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
return 0;
}
int __kprobes arch_trampoline_kprobe(struct kprobe *p)
{
return 0;
}
static struct undef_hook kprobes_break_hook = {
.instr_mask = 0xffffffff,
.instr_val = KPROBE_BREAKPOINT_INSTRUCTION,
......
......@@ -245,10 +245,7 @@ static struct fb_monspecs at91fb_default_monspecs = {
static void at91_lcdc_power_control(int on)
{
if (on)
at91_set_gpio_value(AT91_PIN_PD12, 0); /* power up */
else
at91_set_gpio_value(AT91_PIN_PD12, 1); /* power down */
at91_set_gpio_value(AT91_PIN_PA30, on);
}
/* Driver datas */
......
......@@ -490,6 +490,11 @@ postcore_initcall(at91_gpio_debugfs_init);
/*--------------------------------------------------------------------------*/
/* This lock class tells lockdep that GPIO irqs are in a different
* category than their parents, so it won't report false recursion.
*/
static struct lock_class_key gpio_lock_class;
/*
* Called from the processor-specific init to enable GPIO interrupt support.
*/
......@@ -510,6 +515,8 @@ void __init at91_gpio_irq_setup(void)
__raw_writel(~0, this->regbase + PIO_IDR);
for (i = 0, pin = this->chipbase; i < 32; i++, pin++) {
lockdep_set_class(&irq_desc[pin].lock, &gpio_lock_class);
/*
* Can use the "simple" and not "edge" handler since it's
* shorter, and the AIC handles interrupts sanely.
......
......@@ -103,7 +103,7 @@ static void
h720x_gpio_handler(unsigned int mask, unsigned int irq,
struct irq_desc *desc)
{
IRQDBG("%s irq: %d\n",__FUNCTION__,irq);
IRQDBG("%s irq: %d\n", __func__, irq);
desc = irq_desc + irq;
while (mask) {
if (mask & 1) {
......@@ -123,7 +123,7 @@ h720x_gpioa_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
mask = CPU_REG(GPIO_A_VIRT,GPIO_STAT);
irq = IRQ_CHAINED_GPIOA(0);
IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
IRQDBG("%s mask: 0x%08x irq: %d\n", __func__, mask,irq);
h720x_gpio_handler(mask, irq, desc);
}
......@@ -133,7 +133,7 @@ h720x_gpiob_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
unsigned int mask, irq;
mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT);
irq = IRQ_CHAINED_GPIOB(0);
IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
IRQDBG("%s mask: 0x%08x irq: %d\n", __func__, mask,irq);
h720x_gpio_handler(mask, irq, desc);
}
......@@ -144,7 +144,7 @@ h720x_gpioc_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
mask = CPU_REG(GPIO_C_VIRT,GPIO_STAT);
irq = IRQ_CHAINED_GPIOC(0);
IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
IRQDBG("%s mask: 0x%08x irq: %d\n", __func__, mask,irq);
h720x_gpio_handler(mask, irq, desc);
}
......@@ -155,7 +155,7 @@ h720x_gpiod_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
mask = CPU_REG(GPIO_D_VIRT,GPIO_STAT);
irq = IRQ_CHAINED_GPIOD(0);
IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
IRQDBG("%s mask: 0x%08x irq: %d\n", __func__, mask,irq);
h720x_gpio_handler(mask, irq, desc);
}
......@@ -167,7 +167,7 @@ h720x_gpioe_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
mask = CPU_REG(GPIO_E_VIRT,GPIO_STAT);
irq = IRQ_CHAINED_GPIOE(0);
IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq);
IRQDBG("%s mask: 0x%08x irq: %d\n", __func__, mask,irq);
h720x_gpio_handler(mask, irq, desc);
}
#endif
......
......@@ -54,7 +54,7 @@ static inline int imx_dma_sg_next(imx_dmach_t dma_ch, unsigned int lastcount)
if (!imxdma->name) {
printk(KERN_CRIT "%s: called for not allocated channel %d\n",
__FUNCTION__, dma_ch);
__func__, dma_ch);
return 0;
}
......@@ -288,7 +288,7 @@ imx_dma_setup_handlers(imx_dmach_t dma_ch,
if (!imxdma->name) {
printk(KERN_CRIT "%s: called for not allocated channel %d\n",
__FUNCTION__, dma_ch);
__func__, dma_ch);
return -ENODEV;
}
......@@ -321,7 +321,7 @@ void imx_dma_enable(imx_dmach_t dma_ch)
if (!imxdma->name) {
printk(KERN_CRIT "%s: called for not allocated channel %d\n",
__FUNCTION__, dma_ch);
__func__, dma_ch);
return;
}
......@@ -365,7 +365,7 @@ int imx_dma_request(imx_dmach_t dma_ch, const char *name)
if (dma_ch >= IMX_DMA_CHANNELS) {
printk(KERN_CRIT "%s: called for non-existed channel %d\n",
__FUNCTION__, dma_ch);
__func__, dma_ch);
return -EINVAL;
}
......@@ -396,7 +396,7 @@ void imx_dma_free(imx_dmach_t dma_ch)
if (!imxdma->name) {
printk(KERN_CRIT
"%s: trying to free channel %d which is already freed\n",
__FUNCTION__, dma_ch);
__func__, dma_ch);
return;
}
......@@ -456,7 +456,7 @@ imx_dma_request_by_prio(imx_dmach_t * pdma_ch, const char *name,
}
}
printk(KERN_ERR "%s: no free DMA channel found\n", __FUNCTION__);
printk(KERN_ERR "%s: no free DMA channel found\n", __func__);
return -ENODEV;
}
......
......@@ -160,21 +160,21 @@ imx_gpio_irq_type(unsigned int _irq, unsigned int type)
static void
imx_gpio_ack_irq(unsigned int irq)
{
DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, irq);
DEBUG_IRQ("%s: irq %d\n", __func__, irq);
ISR(IRQ_TO_REG(irq)) = 1 << ((irq - IRQ_GPIOA(0)) % 32);
}
static void
imx_gpio_mask_irq(unsigned int irq)
{
DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, irq);
DEBUG_IRQ("%s: irq %d\n", __func__, irq);
IMR(IRQ_TO_REG(irq)) &= ~( 1 << ((irq - IRQ_GPIOA(0)) % 32));
}
static void
imx_gpio_unmask_irq(unsigned int irq)
{
DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, irq);
DEBUG_IRQ("%s: irq %d\n", __func__, irq);
IMR(IRQ_TO_REG(irq)) |= 1 << ((irq - IRQ_GPIOA(0)) % 32);
}
......
......@@ -81,7 +81,7 @@ static void __init iq81340mc_init(void)
static void __init iq81340mc_timer_init(void)
{
unsigned long bus_freq = iop13xx_core_freq() / iop13xx_xsi_bus_ratio();
printk(KERN_DEBUG "%s: bus frequency: %lu\n", __FUNCTION__, bus_freq);
printk(KERN_DEBUG "%s: bus frequency: %lu\n", __func__, bus_freq);
iop_init_time(bus_freq);
}
......
......@@ -83,7 +83,7 @@ static void __init iq81340sc_init(void)
static void __init iq81340sc_timer_init(void)
{
unsigned long bus_freq = iop13xx_core_freq() / iop13xx_xsi_bus_ratio();
printk(KERN_DEBUG "%s: bus frequency: %lu\n", __FUNCTION__, bus_freq);
printk(KERN_DEBUG "%s: bus frequency: %lu\n", __func__, bus_freq);
iop_init_time(bus_freq);
}
......
......@@ -94,13 +94,13 @@ void iop13xx_map_pci_memory(void)
, 0, iop13xx_atux_mem_size, MT_DEVICE);
if (!iop13xx_atux_mem_base) {
printk("%s: atux allocation "
"failed\n", __FUNCTION__);
"failed\n", __func__);
BUG();
}
} else
iop13xx_atux_mem_size = 0;
PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n",
__FUNCTION__, atu, iop13xx_atux_mem_size,
__func__, atu, iop13xx_atux_mem_size,
iop13xx_atux_mem_base);
break;
case 1:
......@@ -120,13 +120,13 @@ void iop13xx_map_pci_memory(void)
, 0, iop13xx_atue_mem_size, MT_DEVICE);
if (!iop13xx_atue_mem_base) {
printk("%s: atue allocation "
"failed\n", __FUNCTION__);
"failed\n", __func__);
BUG();
}
} else
iop13xx_atue_mem_size = 0;
PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n",
__FUNCTION__, atu, iop13xx_atue_mem_size,
__func__, atu, iop13xx_atue_mem_size,
iop13xx_atue_mem_base);
break;
}
......
......@@ -519,7 +519,7 @@ void __init iop13xx_platform_init(void)
if (iq8134x_flash_resource.end > iq8134x_flash_resource.start)
iop13xx_devices[plat_idx++] = &iq8134x_flash;
else
printk(KERN_ERR "%s: Failed to probe flash size\n", __FUNCTION__);
printk(KERN_ERR "%s: Failed to probe flash size\n", __func__);
#endif
platform_add_devices(iop13xx_devices, plat_idx);
......
......@@ -87,7 +87,7 @@ static inline int check_master_abort(void)
if (isr & PCI_ISR_PFE) {
/* make sure the Master Abort bit is reset */
*PCI_ISR = PCI_ISR_PFE;
pr_debug("%s failed\n", __FUNCTION__);
pr_debug("%s failed\n", __func__);
return 1;
}
......
......@@ -65,7 +65,7 @@ static int __init gtwx5715_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
else
rc = gtwx5715_irqmap[slot][pin-1];
printk("%s: Mapped slot %d pin %d to IRQ %d\n", __FUNCTION__,slot, pin, rc);
printk("%s: Mapped slot %d pin %d to IRQ %d\n", __func__, slot, pin, rc);
return(rc);
}
......
......@@ -133,7 +133,7 @@ netx_hif_ack_irq(unsigned int _irq)
val &= ~((1 << 24) << irq);
writel(val, NETX_DPMAS_INT_EN);
DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq);
DEBUG_IRQ("%s: irq %d\n", __func__, _irq);
}
static void
......@@ -145,7 +145,7 @@ netx_hif_mask_irq(unsigned int _irq)
val = readl(NETX_DPMAS_INT_EN);
val &= ~((1 << 24) << irq);
writel(val, NETX_DPMAS_INT_EN);
DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq);
DEBUG_IRQ("%s: irq %d\n", __func__, _irq);
}
static void
......@@ -157,7 +157,7 @@ netx_hif_unmask_irq(unsigned int _irq)
val = readl(NETX_DPMAS_INT_EN);
val |= (1 << 24) << irq;
writel(val, NETX_DPMAS_INT_EN);
DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq);
DEBUG_IRQ("%s: irq %d\n", __func__, _irq);
}
static struct irq_chip netx_hif_chip = {
......
......@@ -31,7 +31,7 @@
static spinlock_t gpio_lock = __SPIN_LOCK_UNLOCKED(gpio_lock);
/* only access gpiores with atomic ops */
static DECLARE_BITMAP(gpiores, GPIO_MAX);
static DECLARE_BITMAP(gpiores, GPIO_MAX + 1);
static inline int ns9xxx_valid_gpio(unsigned gpio)
{
......
......@@ -350,6 +350,10 @@ static void __init h2_init_smc91x(void)
static struct i2c_board_info __initdata h2_i2c_board_info[] = {
{
I2C_BOARD_INFO("tps65010", 0x48),
.type = "tps65010",
.irq = OMAP_GPIO_IRQ(58),
}, {
I2C_BOARD_INFO("isp1301_omap", 0x2d),
.type = "isp1301_omap",
.irq = OMAP_GPIO_IRQ(2),
......
......@@ -26,6 +26,7 @@
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/i2c/tps65010.h>
#include <asm/setup.h>
......@@ -51,6 +52,8 @@
#include <asm/arch/mcbsp.h>
#include <asm/arch/omap-alsa.h>
#define H3_TS_GPIO 48
static int h3_keymap[] = {
KEY(0, 0, KEY_LEFT),
KEY(0, 1, KEY_RIGHT),
......@@ -373,6 +376,17 @@ static struct platform_device h3_lcd_device = {
.id = -1,
};
static struct spi_board_info h3_spi_board_info[] __initdata = {
[0] = {
.modalias = "tsc2101",
.bus_num = 2,
.chip_select = 0,
.irq = OMAP_GPIO_IRQ(H3_TS_GPIO),
.max_speed_hz = 16000000,
/* .platform_data = &tsc_platform_data, */
},
};
static struct omap_mcbsp_reg_cfg mcbsp_regs = {
.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
.spcr1 = RINTM(3) | RRST,
......@@ -457,6 +471,14 @@ static struct omap_board_config_kernel h3_config[] __initdata = {
{ OMAP_TAG_LCD, &h3_lcd_config },
};
static struct i2c_board_info __initdata h3_i2c_board_info[] = {
{
I2C_BOARD_INFO("tps65010", 0x48),
.type = "tps65013",
/* .irq = OMAP_GPIO_IRQ(??), */
},
};
static struct omap_gpio_switch h3_gpio_switches[] __initdata = {
{
.name = "mmc_slot",
......
......@@ -717,7 +717,7 @@ static int __init omap_pm_init(void)
#endif
#ifdef CONFIG_OMAP_32K_TIMER
error = sysfs_create_file(power_kobj, &sleep_while_idle_attr);
error = sysfs_create_file(power_kobj, &sleep_while_idle_attr.attr);
if (error)
printk(KERN_ERR "sysfs_create_file failed: %d\n", error);
#endif
......
......@@ -42,6 +42,12 @@ static struct map_desc omap2_io_desc[] __initdata = {
.length = L3_24XX_SIZE,
.type = MT_DEVICE
},
{
.virtual = L4_24XX_VIRT,
.pfn = __phys_to_pfn(L4_24XX_PHYS),
.length = L4_24XX_SIZE,
.type = MT_DEVICE
},
#ifdef CONFIG_ARCH_OMAP2430
{
.virtual = L4_WK_243X_VIRT,
......
......@@ -97,14 +97,20 @@
#define PCIE_BAR_CTRL(n) ORION_PCIE_REG(0x1804 + ((n - 1) * 4))
#define PCIE_BAR_LO(n) ORION_PCIE_REG(0x0010 + ((n) * 8))
#define PCIE_BAR_HI(n) ORION_PCIE_REG(0x0014 + ((n) * 8))
#define PCIE_WIN_CTRL(n) ORION_PCIE_REG(0x1820 + ((n) << 4))
#define PCIE_WIN_BASE(n) ORION_PCIE_REG(0x1824 + ((n) << 4))
#define PCIE_WIN_REMAP(n) ORION_PCIE_REG(0x182c + ((n) << 4))
#define PCIE_WIN_CTRL(n) (((n) < 5) ? \
ORION_PCIE_REG(0x1820 + ((n) << 4)) : \
ORION_PCIE_REG(0x1880))
#define PCIE_WIN_BASE(n) (((n) < 5) ? \
ORION_PCIE_REG(0x1824 + ((n) << 4)) : \
ORION_PCIE_REG(0x1884))
#define PCIE_WIN_REMAP(n) (((n) < 5) ? \
ORION_PCIE_REG(0x182c + ((n) << 4)) : \
ORION_PCIE_REG(0x188c))
#define PCIE_DEFWIN_CTRL ORION_PCIE_REG(0x18b0)
#define PCIE_EXPROM_WIN_CTRL ORION_PCIE_REG(0x18c0)
#define PCIE_EXPROM_WIN_REMP ORION_PCIE_REG(0x18c4)
#define PCIE_MAX_BARS 3
#define PCIE_MAX_WINS 5
#define PCIE_MAX_WINS 6
/*
* Use PCIE BAR '1' for all DDR banks
......
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