Commit 2e11665c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6

* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: Convert INTC2 to IRQ table registration.
  sh: Updates for irq-flow-type naming changes.
  sh: Add some missing board headers.
  sh: Fix exception_handling_table alignment.
  sh: Cleanup board header directories.
  sh: Remove board-specific ide.h headers.
  sh: Proper show_stack/show_trace() implementation.
parents 5cfc35cf 66a74057
......@@ -14,7 +14,7 @@
#include <asm/io.h>
#include <asm/apm.h>
#include <asm/adc.h>
#include <asm/hp6xx/hp6xx.h>
#include <asm/hp6xx.h>
#define SH7709_PGDR 0xa400012c
......
......@@ -12,7 +12,7 @@
#include <linux/time.h>
#include <asm/io.h>
#include <asm/hd64461.h>
#include <asm/hp6xx/hp6xx.h>
#include <asm/hp6xx.h>
#include <asm/cpu/dac.h>
#include <asm/pm.h>
......
......@@ -13,7 +13,7 @@
#include <asm/hd64461.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/hp6xx/hp6xx.h>
#include <asm/hp6xx.h>
#include <asm/cpu/dac.h>
#define SCPCR 0xa4000116
......
......@@ -15,7 +15,7 @@
#include <linux/module.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/hs7751rvoip/hs7751rvoip.h>
#include <asm/hs7751rvoip.h>
#include <asm/addrspace.h>
extern void *area6_io8_base; /* Area 6 8bit I/O Base address */
......
......@@ -14,7 +14,7 @@
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/hs7751rvoip/hs7751rvoip.h>
#include <asm/hs7751rvoip.h>
static int mask_pos[] = {8, 9, 10, 11, 12, 13, 0, 1, 2, 3, 4, 5, 6, 7};
......
......@@ -10,15 +10,10 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/mm.h>
#include <linux/vmalloc.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/pm.h>
#include <asm/hs7751rvoip.h>
#include <asm/io.h>
#include <asm/hs7751rvoip/hs7751rvoip.h>
#include <asm/machvec.h>
#include <asm/rtc.h>
#include <asm/irq.h>
static void __init hs7751rvoip_init_irq(void)
{
......
......@@ -11,7 +11,7 @@
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <asm/r7780rp/r7780rp.h>
#include <asm/r7780rp.h>
#include <asm/addrspace.h>
#include <asm/io.h>
......
......@@ -10,7 +10,8 @@
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <linux/io.h>
#include <asm/r7780rp.h>
#ifdef CONFIG_SH_R7780MP
static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
......@@ -32,7 +33,7 @@ static void disable_r7780rp_irq(unsigned int irq)
}
static struct irq_chip r7780rp_irq_chip __read_mostly = {
.name = "r7780rp",
.name = "R7780RP",
.mask = disable_r7780rp_irq,
.unmask = enable_r7780rp_irq,
.mask_ack = disable_r7780rp_irq,
......@@ -47,8 +48,8 @@ void __init init_r7780rp_IRQ(void)
for (i = 0; i < 15; i++) {
disable_irq_nosync(i);
set_irq_chip_and_handler(i, &r7780rp_irq_chip,
handle_level_irq);
set_irq_chip_and_handler_name(i, &r7780rp_irq_chip,
handle_level_irq, "level");
enable_r7780rp_irq(i);
}
}
......@@ -13,7 +13,7 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/r7780rp/r7780rp.h>
#include <asm/r7780rp.h>
#include <asm/clock.h>
#include <asm/io.h>
......
......@@ -11,8 +11,8 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/rts7751r2d/rts7751r2d.h>
#include <asm/io.h>
#include <linux/io.h>
#include <asm/rts7751r2d.h>
#include <asm/addrspace.h>
/*
......
......@@ -8,12 +8,10 @@
* Modified for RTS7751R2D by
* Atom Create Engineering Co., Ltd. 2002.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/rts7751r2d/rts7751r2d.h>
#include <linux/io.h>
#include <asm/rts7751r2d.h>
#if defined(CONFIG_RTS7751R2D_REV11)
static int mask_pos[] = {11, 9, 8, 12, 10, 6, 5, 4, 7, 14, 13, 0, 0, 0, 0};
......
......@@ -8,13 +8,9 @@
*
* This file contains Renesas Technology Sales RTS7751R2D specific LED code.
*/
#include <asm/io.h>
#include <asm/rts7751r2d/rts7751r2d.h>
#ifdef CONFIG_HEARTBEAT
#include <linux/io.h>
#include <linux/sched.h>
#include <asm/rts7751r2d.h>
/* Cycle the LED's in the clasic Knightriger/Sun pattern */
void heartbeat_rts7751r2d(void)
......@@ -46,10 +42,3 @@ void heartbeat_rts7751r2d(void)
else
bit--;
}
#endif /* CONFIG_HEARTBEAT */
void rts7751r2d_led(unsigned short value)
{
ctrl_outw(value, PA_OUTPORT);
}
......@@ -12,9 +12,9 @@
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/pm.h>
#include <asm/io.h>
#include <asm/machvec.h>
#include <asm/mach/rts7751r2d.h>
#include <asm/io.h>
#include <asm/voyagergx.h>
extern void heartbeat_rts7751r2d(void);
......
......@@ -7,7 +7,7 @@
*/
#include <linux/init.h>
#include <asm/machvec.h>
#include <asm/shmin/shmin.h>
#include <asm/shmin.h>
#include <asm/clock.h>
#include <asm/irq.h>
#include <asm/io.h>
......
......@@ -17,29 +17,18 @@
Copyright 2003 (c) Lineo uSolutions,Inc.
*/
/* -------------------------------------------------------------------- */
#undef DEBUG
#include <linux/sched.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <linux/io.h>
#include <asm/voyagergx.h>
#include <asm/rts7751r2d.h>
static void disable_voyagergx_irq(unsigned int irq)
{
unsigned long val;
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
val = inl(VOYAGER_INT_MASK);
val &= ~mask;
outl(val, VOYAGER_INT_MASK);
......@@ -50,7 +39,7 @@ static void enable_voyagergx_irq(unsigned int irq)
unsigned long val;
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
val = inl(VOYAGER_INT_MASK);
val |= mask;
outl(val, VOYAGER_INT_MASK);
......@@ -137,7 +126,7 @@ int voyagergx_irq_demux(int irq)
} else {
printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val);
}
pr_debug("voyagergx_irq_demux %d \n", i);
pr_debug("voyagergx_irq_demux %ld\n", i);
#else
for (bit = 1, i = 0 ; i < VOYAGER_IRQ_NUM ; bit <<= 1, i++)
if (val & bit)
......@@ -185,4 +174,3 @@ void __init setup_voyagergx_irq(void)
setup_irq(IRQ_VOYAGER, &irq0);
}
......@@ -13,7 +13,7 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <asm/r7780rp/r7780rp.h>
#include <asm/r7780rp.h>
#include <asm/io.h>
#include "pci-sh4.h"
......
......@@ -10,28 +10,24 @@
*
* PCI initialization for the Renesas SH7751R RTS7751R2D board
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <asm/rts7751r2d/rts7751r2d.h>
#include <asm/io.h>
#include <linux/io.h>
#include <asm/rts7751r2d.h>
#include "pci-sh4.h"
static u8 rts7751r2d_irq_tab[] __initdata = {
IRQ_PCISLOT1,
IRQ_PCISLOT2,
IRQ_PCMCIA,
IRQ_PCIETH,
};
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
switch (slot) {
case 0: return IRQ_PCISLOT1; /* PCI Extend slot #1 */
case 1: return IRQ_PCISLOT2; /* PCI Extend slot #2 */
case 2: return IRQ_PCMCIA; /* PCI Cardbus Bridge */
case 3: return IRQ_PCIETH; /* Realtek Ethernet controller */
default:
printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
return -1;
}
return rts7751r2d_irq_tab[slot];
}
static struct resource sh7751_io_resource = {
......
......@@ -11,10 +11,9 @@
* Hitachi 7751, the STM ST40 STB1, SH7760, and SH7780.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/system.h>
#include <asm/io.h>
static void disable_intc2_irq(unsigned int irq)
{
......@@ -31,7 +30,7 @@ static void enable_intc2_irq(unsigned int irq)
}
static struct irq_chip intc2_irq_chip = {
.typename = "intc2",
.name = "INTC2",
.mask = disable_intc2_irq,
.unmask = enable_intc2_irq,
.mask_ack = disable_intc2_irq,
......@@ -45,150 +44,36 @@ static struct irq_chip intc2_irq_chip = {
* PIO1 which is INTPRI00[19,16] and INTMSK00[13]
* would be: ^ ^ ^ ^
* | | | |
* make_intc2_irq(84, 0, 16, 0, 13);
* { 84, 0, 16, 0, 13 },
*
* in the intc2_data table.
*/
void make_intc2_irq(struct intc2_data *p)
void make_intc2_irq(struct intc2_data *table, unsigned int nr_irqs)
{
unsigned int flags;
unsigned long ipr;
disable_irq_nosync(p->irq);
/* Set the priority level */
local_irq_save(flags);
ipr = ctrl_inl(INTC2_BASE + INTC2_INTPRI_OFFSET + p->ipr_offset);
ipr &= ~(0xf << p->ipr_shift);
ipr |= p->priority << p->ipr_shift;
ctrl_outl(ipr, INTC2_BASE + INTC2_INTPRI_OFFSET + p->ipr_offset);
local_irq_restore(flags);
int i;
set_irq_chip_and_handler(p->irq, &intc2_irq_chip, handle_level_irq);
set_irq_chip_data(p->irq, p);
for (i = 0; i < nr_irqs; i++) {
unsigned long ipr, flags;
struct intc2_data *p = table + i;
enable_intc2_irq(p->irq);
}
disable_irq_nosync(p->irq);
static struct intc2_data intc2_irq_table[] = {
#if defined(CONFIG_CPU_SUBTYPE_ST40)
{64, 0, 0, 0, 0, 13}, /* PCI serr */
{65, 0, 4, 0, 1, 13}, /* PCI err */
{66, 0, 4, 0, 2, 13}, /* PCI ad */
{67, 0, 4, 0, 3, 13}, /* PCI pwd down */
{72, 0, 8, 0, 5, 13}, /* DMAC INT0 */
{73, 0, 8, 0, 6, 13}, /* DMAC INT1 */
{74, 0, 8, 0, 7, 13}, /* DMAC INT2 */
{75, 0, 8, 0, 8, 13}, /* DMAC INT3 */
{76, 0, 8, 0, 9, 13}, /* DMAC INT4 */
{78, 0, 8, 0, 11, 13}, /* DMAC ERR */
{80, 0, 12, 0, 12, 13}, /* PIO0 */
{84, 0, 16, 0, 13, 13}, /* PIO1 */
{88, 0, 20, 0, 14, 13}, /* PIO2 */
{112, 4, 0, 4, 0, 13}, /* Mailbox */
#ifdef CONFIG_CPU_SUBTYPE_ST40GX1
{116, 4, 4, 4, 4, 13}, /* SSC0 */
{120, 4, 8, 4, 8, 13}, /* IR Blaster */
{124, 4, 12, 4, 12, 13}, /* USB host */
{128, 4, 16, 4, 16, 13}, /* Video processor BLITTER */
{132, 4, 20, 4, 20, 13}, /* UART0 */
{134, 4, 20, 4, 22, 13}, /* UART2 */
{136, 4, 24, 4, 24, 13}, /* IO_PIO0 */
{140, 4, 28, 4, 28, 13}, /* EMPI */
{144, 8, 0, 8, 0, 13}, /* MAFE */
{148, 8, 4, 8, 4, 13}, /* PWM */
{152, 8, 8, 8, 8, 13}, /* SSC1 */
{156, 8, 12, 8, 12, 13}, /* IO_PIO1 */
{160, 8, 16, 8, 16, 13}, /* USB target */
{164, 8, 20, 8, 20, 13}, /* UART1 */
{168, 8, 24, 8, 24, 13}, /* Teletext */
{172, 8, 28, 8, 28, 13}, /* VideoSync VTG */
{173, 8, 28, 8, 29, 13}, /* VideoSync DVP0 */
{174, 8, 28, 8, 30, 13}, /* VideoSync DVP1 */
#endif
#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
/*
* SH7760 INTC2-Style interrupts, vectors IRQ48-111 INTEVT 0x800-0xFE0
*/
/* INTPRIO0 | INTMSK0 */
{48, 0, 28, 0, 31, 3}, /* IRQ 4 */
{49, 0, 24, 0, 30, 3}, /* IRQ 3 */
{50, 0, 20, 0, 29, 3}, /* IRQ 2 */
{51, 0, 16, 0, 28, 3}, /* IRQ 1 */
/* 52-55 (INTEVT 0x880-0x8E0) unused/reserved */
/* INTPRIO4 | INTMSK0 */
{56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
{57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
{58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
{59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */
{60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */
{61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
{62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
{63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
/* INTPRIO8 | INTMSK0 */
{52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
{53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
{54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
{55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
{64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
{65, 8, 24, 0, 16, 3}, /* LCDC */
/* 66, 67 unused */
{68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
{69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
{70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
/* 71 unused */
{72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
{73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
{74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
{75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */
{76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */
{77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
{78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
{79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
/* | INTMSK4 */
{80, 8, 4, 4, 23, 3}, /* SIM_ERI */
{81, 8, 4, 4, 22, 3}, /* SIM_RXI */
{82, 8, 4, 4, 21, 3}, /* SIM_TXI */
{83, 8, 4, 4, 20, 3}, /* SIM_TEI */
{84, 8, 0, 4, 19, 3}, /* HSPII */
/* INTPRIOC | INTMSK4 */
/* 85-87 unused/reserved */
{88, 12, 20, 4, 18, 3}, /* MMCI0 */
{89, 12, 20, 4, 17, 3}, /* MMCI1 */
{90, 12, 20, 4, 16, 3}, /* MMCI2 */
{91, 12, 20, 4, 15, 3}, /* MMCI3 */
{92, 12, 12, 4, 6, 3}, /* MFI (unsure, bug? in my 7760 manual*/
/* 93-107 reserved/undocumented */
{108,12, 4, 4, 1, 3}, /* ADC */
{109,12, 0, 4, 0, 3}, /* CMTI */
/* 110-111 reserved/unused */
#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
{ TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2},
{ 21, 1, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY },
{ 22, 1, 1, 0, INTC_RTC_MSK, TIMER_PRIORITY },
{ 23, 1, 2, 0, INTC_RTC_MSK, TIMER_PRIORITY },
{ SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
{ SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
{ SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
{ SCIF0_TXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
/* Set the priority level */
local_irq_save(flags);
{ SCIF1_ERI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
{ SCIF1_RXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
{ SCIF1_BRI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
{ SCIF1_TXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
ipr = ctrl_inl(INTC2_BASE + INTC2_INTPRI_OFFSET +
p->ipr_offset);
ipr &= ~(0xf << p->ipr_shift);
ipr |= p->priority << p->ipr_shift;
ctrl_outl(ipr, INTC2_BASE + INTC2_INTPRI_OFFSET +
p->ipr_offset);
{ PCIC0_IRQ, 0x10, 8, 0, INTC_PCIC0_MSK, PCIC0_PRIORITY },
{ PCIC1_IRQ, 0x10, 0, 0, INTC_PCIC1_MSK, PCIC1_PRIORITY },
{ PCIC2_IRQ, 0x14, 24, 0, INTC_PCIC2_MSK, PCIC2_PRIORITY },
{ PCIC3_IRQ, 0x14, 16, 0, INTC_PCIC3_MSK, PCIC3_PRIORITY },
{ PCIC4_IRQ, 0x14, 8, 0, INTC_PCIC4_MSK, PCIC4_PRIORITY },
#endif
};
local_irq_restore(flags);
void __init init_IRQ_intc2(void)
{
int i;
set_irq_chip_and_handler_name(p->irq, &intc2_irq_chip,
handle_level_irq, "level");
set_irq_chip_data(p->irq, p);
for (i = 0; i < ARRAY_SIZE(intc2_irq_table); i++)
make_intc2_irq(intc2_irq_table + i);
enable_intc2_irq(p->irq);
}
}
......@@ -44,7 +44,7 @@ static void enable_ipr_irq(unsigned int irq)
}
static struct irq_chip ipr_irq_chip = {
.name = "ipr",
.name = "IPR",
.mask = disable_ipr_irq,
.unmask = enable_ipr_irq,
.mask_ack = disable_ipr_irq,
......@@ -60,7 +60,8 @@ void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority)
ipr_data.shift = pos*4; /* POSition (0-3) x 4 means shift */
ipr_data.priority = priority;
set_irq_chip_and_handler(irq, &ipr_irq_chip, handle_level_irq);
set_irq_chip_and_handler_name(irq, &ipr_irq_chip,
handle_level_irq, "level");
set_irq_chip_data(irq, &ipr_data);
enable_ipr_irq(irq);
......
......@@ -4,7 +4,7 @@
* The SH-3 exception vector table.
* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
* Copyright (C) 2003 Paul Mundt
* Copyright (C) 2003 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
......@@ -49,3 +49,10 @@ ENTRY(nmi_slot)
#endif
ENTRY(user_break_point_trap)
.long break_point_trap /* 1E0 */
/*
* Pad the remainder of the table out, exceptions residing in far
* away offsets can be manually inserted in to their appropriate
* location via set_exception_table_{evt,vec}().
*/
.balign 4096,0,4096
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